Target 4 Flight Path 30R

About ICE II

Irradiation of Chips Electronics (ICE II) is located on the 30° flight path of WNR. At this angle, the shape of the neutron spectrum here is very similar to that of neutrons produced in the atmosphere by cosmic rays but with a neutron flux a million times higher, depending on altitude. This large flux allows testing of semiconductor devices at greatly accelerated rates. Companies from around the world can use the WNR high-energy-neutron source to characterize components and study various failure modes caused by neutron radiation 

Accelerated Neutron Testing of Semiconductor Devices

Introduction

The high-energy neutron source at the Neutron and Nuclear Science (WNR) Facility provides a capability for accelerated neutron testing of semiconductor devices. This testing is important because neutrons have been recognized as a significant threat to semiconductor devices at aircraft altitudes and below. The shape of the neutron spectrum produced at WNR is very similar to the spectrum of neutrons produced in the atmosphere by cosmic rays, but it is more than five orders of magnitude more intense. Since 1992, many companies, including Texas Instruments, the Boeing Company, Hewlett Packard, Lockheed Martin, Digital Equipment, and Intel, continue to use the high-energy neutron source at WNR to study various failure modes caused by neutron radiation. (There has been more industrial participation in this activity than in any other user activity at LANL.) The ultimate goal of this research will be to find ways to overcome the affects of incoming galactic and solar cosmic-ray-induced neutrons.

Effects of Neutrons Produced in Space

Neutrons are produced by galactic and solar cosmic rays reacting with the nuclei in the upper atmosphere. Although most of the primary charged-particle components of the cosmic-ray shower are absorbed by the atmosphere, neutrons are able to reach aircraft altitudes and below because they have no charge. These incoming neutrons penetrate semiconductor devices and collide with the atoms in the material, causing charged recoils (from neutron/atom collisions) and the production of secondary particles (protons, electrons) that deposit charge and energy in the devices. This charge deposition can initiate so-called single-event effects in semiconductor devices that can seriously affect device performance.

Single-event effects include single-event upsets (SEUs), multiple-event upsets (MEUs), single-event latchup, single-event burnout, and gate rupture. SEUs occur when a memory location changes its state because of charge deposited by an energetic particle. SEUs typically occur at a rate of approximately one upset per billion bits per hour at aircraft altitudes. Although this type of failure may be corrected by error checking, increased costs and a loss of performance are associated with this solution. MEUs, where several memory locations are altered, have been measured to be a few percent of the single-event rate. MEU failures may be more difficult to correct than SEUs. Failures such as latchup in which a device ceases to function are significantly less frequent but may be more serious because they usually require turning the device off and then on to eliminate the latchup. Other more serious failure modes occur in highpower devices in which a neutron can initiate a cascade of charged particles that causes these devices to draw large currents—possibly permanently damaging them as a result. The failure rate in these devices strongly depends on the amount of applied voltage. The failure rate increases dramatically above a critical threshold voltage that may be significantly less than the rated voltage of the device.

Testing Semiconductor Devices at Greatly Accelerated Rate

An experimental area dedicated to accelerated neutron testing is located on the 30°L (left of the incident proton beam) flight path and also on the 30°R flight path at the high-energy neutron source at LANSCE. The shape of the neutron energy spectrum on these flight paths is comparable to the naturally occurring high-altitude neutron spectrum (multiplied by 3 x 105) in Fig. 2. As shown in this plot, the shape of the LANSCE spectrum is very similar to the cosmic-ray-induced neutron spectrum but more than five orders of magnitude more intense. The integrated neutron flux above 1 MeV is approximately 106 neutrons/cm2/s. This large neutron intensity allows testing of semiconductor devices at a greatly accelerated rate in which one hour of exposure at LANSCE is equivalent to more than 100 years of flight time.

Fig. 2. The LANSCE neutron spectrum is very similar to the cosmic-ray-induced neutron spectrum, but it is more than five orders of magnitude more intense. The WNR flux is shown in red, and the Cosmic ray flux is shown in blue.

The shape of the neutron spectrum may be altered by placing material such as polyethylene in the beam. This material serves as an absorber, allowing a greater percentage of higher-energy neutrons through to the test object as lower-energy neutrons are scattered by the hydrogen atoms in the material. Fig. 3 shows the effect on the shape of the neutron spectrum obtained by adding various amounts of polyethylene absorbers in the neutron beam. Semiconductor devices under test are placed in the neutron beam in open air. The neutron beam is collimated to a diameter of approximately 8 cm at the test location. Because the neutrons are not strongly absorbed by the device and the supporting boards, several devices may be placed in the neutron beam at once, one behind the other.

The testing buildings have a shield wall that separates the irradiation and data areas and allows experimenters to move between the beam and the data-acquisition areas without going outside. An access road into the east side of the facility yard allows for easy transport and setup of equipment.